San Jose, Calif. – February 13, 2015 – Alliacense today announced that STMicroelectronics and The TPL Group resolved the Fast Logic™ Portfolio patent infringement lawsuit filed by The TPL Group in U.S. District Court.
STMicroelectronics joins more than 40 other global electronics leaders who have purchased Fast Logic licenses since the licensing program began in 2007, including Samsung, Broadcom, Fujitsu and Freescale.
Alliacense is the recognized leader in the design and execution of Intellectual Property (IP) development and licensing. As a cadre of IP licensing strategists, technology experts, and experienced business development/management executives, Alliacense focuses on expanding the awareness and value of IP portfolios its under management, and providing a peerless array of capabilities that enhance the effectiveness of IP. For more information, visit www.alliacense.com.
About the Fast Logic™ Portfolio
The Fast Logic Portfolio includes U.S. Patent No. 5,030,853, titled “High Speed Logic and Memory Family Using Ring Segment Buffer,” U.S. Patent No. 5,391,949, titled “Differential Latching Inverter Circuit,” U.S. Patent No. 5,247,212, titled “Complementary Logic Input Parallel (CLIP) Logic Circuit Family,” U.S. Patent No. 5,001,367, titled “High Speed Complementary Field Effect Transistor Logic Circuits,” and U.S. Patent No. 5,363,001, titled “Data Input Register For Random Access Memory.”
These innovations of visionary scientist Albert Vinal founder of Thunderbird Technologies have become common building blocks in today’s electronics products. Thunderbird Technologies develops fundamental design techniques for high-speed memories and high-performance transistor design. Thunderbird’s high-speed memory designs include improvements to circuit and associated transistor design. In 2007, The TPL Group partnered with Thunderbird Technologies to advance these protected, fundamental innovations as the Fast Logic Portfolio. See more information: Fast Logic Portfolio.
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