Datalogic S.p.A. Purchases Fast Logic Portfolio™ License

CUPERTINO, California – 18 June 2013 – Alliacense today announced that Datalogic S.p.A.has purchased a Fast Logic Portfolio™ license. Datalogic S.p.A. is a world-class producer of bar code readers, data collection mobile computers and vision systems.

About Alliacense
Alliacense is a recognized leader in the design and execution of Intellectual Property (IP) licensing programs. As a cadre of IP licensing strategists, technology experts, and experienced business development/management executives, Alliacense focuses on expanding the awareness and value of IP portfolios under management. For more information, visit

About the Fast Logic™ Portfolio
The Fast Logic Portfolio includes U.S. Patent No. 5,030,853, titled “High Speed Logic and Memory Family Using Ring Segment Buffer,” U.S. Patent No. 5,391,949, titled “Differential Latching Inverter Circuit,” U.S. Patent No. 5,247,212, titled “Complementary Logic Input Parallel (CLIP) Logic Circuit Family,” U.S. Patent No. 5,001,367, titled “High Speed Complementary Field Effect Transistor Logic Circuits,” and U.S. Patent No. 5,363,001, titled “Data Input Register For Random Access Memory.” These innovations of visionary scientist Albert Vinal founder of Thunderbird Technologies have become common building blocks in today’s electronics products. Thunderbird Technologies develops fundamental design techniques for high-speed memories and high-performance transistor design. Thunderbird’s high-speed memory designs include improvements to circuit and associated transistor design. In 2007, The TPL Group partnered with Thunderbird Technologies to advance these protected, fundamental innovations as the Fast Logic Portfolio.

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