Alliacense
 


FAST logic Portfolio

Technology
 
The FAST logic™ Portfolio includes US patents as well as several non-US counterparts.
 
FAST logic Portfolio Lifecycle
click for a larger image

The FAST logic Portfolio covers several fundamental designs widely used in high-speed integrated logic circuits (memories, caches, etc.).


US‘367: Fast Logic Gate
The high-speed complementary FET logic AND (NAND)/ OR (NOR) circuits use fewer transistors

US‘853: Fast Buffer Cell Logic
The high-speed ring segment buffer circuit offers increased performance when driving large capacitive loads

US‘212: Fast Logic Timing
The Fast Timing Logic circuits offer significantly increased input noise immunity for clocked logic

US‘949: Fast Sense Amp
The differential latching inverter sense amp structure offers marked increase in speed
Copyright 2007 Alliacense | Contact Us